1. Field
Exemplary embodiments of the invention relate to a timing controller and a display apparatus having the timing controller. More particularly, exemplary embodiments of the invention relate to a timing controller capable of improving a driving reliability and a display apparatus having the timing controller.
2. Description of the Related Art
Generally, a liquid crystal display (“LCD”) apparatus includes a first substrate including a pixel electrode, a second substrate including a common electrode and a liquid crystal layer disposed between the first and second substrate. An electric field is generated by voltages applied to the pixel electrode and the common electrode. By adjusting an intensity of the electric field, a transmittance of a light passing through the liquid crystal layer may be adjusted so that a desired image may be displayed.
Generally, a display apparatus includes a display panel, a panel driver and a timing controller to control the panel driver. The display panel includes a plurality of gate lines and a plurality of data lines. The panel driver includes a gate driver providing gate signals to the gate lines and a data driver providing data voltages to the data lines.
To decrease the width of the bezel, a chip on glass (“COG”) method has been employed. In the COG method, a portion of the panel driver or an entire panel driver is mounted on a substrate of the display panel. As a resolution of the display panel increases, the number of data driving chips which are mounted by the chip on glass method increases.
In a structure in which the timing controller and a plurality of the data driving chips are connected in a point-to-point method, distances between the timing controller and the data driving chips may be different from each other.
As a wiring structure between the data driving chip and the timing controller increases, resistance of wire increases. Thus, the data driving chip which is disposed relatively far from the timing controller may require relatively high leveled power.
In contrast, as a wiring structure between the data driving chip and the timing controller decreases, resistance of wire decreases. Thus, the data driving chip which is disposed relatively near from the timing controller may require relatively low leveled power.
Thus, when a relatively high leveled power is applied to the data driving chip to drive the data driving chip which is disposed relatively far from the timing controller, a power consumption increases and a noise is generated.